info@kingsunpcb.com, Author at King Sun PCB

How To Make Heavy Copper PCB?

With the rapid development of communication technology in automotive electronics and power supply, 10OZ and above ultra thick copper circuit board has gradually become a kind of special PCB board has broad market prospect, by the circuit board manufacturers more and more attention, at the same time with the printed circuit board is used more and more widely in the field of electronic equipment, are increasingly high demands on the PCB printed circuit board, we will not only provide the necessary electrical connection and mechanical support for electronic components, but also gradually endowed with additional functions, and can be integrated, power provided extra thick copper printed circuit board for high current and high reliability products PCB industry has gradually become a hot research. The products used for military products.

At present in the industry to do more of the PCB copper foil thickness is usually between 2OZ~4OZ, and for the finished copper 10OZ thick and ultra thick copper PCB production reports over almost no, this paper mainly focuses on the key process of 10OZ super thick copper PCB production technology and production control in the process of the follow-up, finally found make an ideal process route and conditions of ultra thick copper PCB.

Experiment

Experimental materials and equipment

(1) FR-4 substrate, in which the plate thickness is 1.6mm, the copper thickness is 4OZ

(2) The conventional equipment for making PCB in our company

Process design

This experiment is a double sided printed circuit board made of copper with a thickness of 10OZ. The specific experimental process is:

Cutting —> Drilling positioning hole—>Pattern transfer —> Pattern electroplating—>Fading film, Etching—> Solder mask printing —> Solidification after solder mask printing —>Copper plating —> Pattern transfer pattern —>Plating —>Etching—>Fade film and Ethching—>Solder mask printing—>Solidification after solder mask—> Drilling —>Copper, plating —>Pattern transfer—>Pattern plating—>Etching—>Fade film and etching—>Solder mask printing—>Solidification after solder mask—> Test—>Outline milling—>Final product inspection

For the “Pattern transfer —> Pattern electroplating” process, this experiment designed three kinds of production solution:

Solution 1: wet film method, its main idea is: using the wet film making good filling of the deck will pave the way and pattern transfer, then electroplating two cycles, thickened about 2OZ thickness, that is based on the thickness of the 2OZ stack, the specific process as shown in Figure.2

Solution 2: a dry film method, its main thought is: after making paste dry film for LDI production line, and then electroplating a cycle, thickened about 1OZ thick, with the thickness of the 1OZ stack, the specific process is shown in figure 3.

Solution 3: two times dry film method, its main thought is: after the first production line of LDI paste dry film making, and plating a cycle (about 1OZ thickness), the basic level of dry film and then paste again dry film line, LDI line, and then a cycle of plating (about 1OZ thickness), with the thickness of the 2OZ stack, specific process as shown in Figure 4.

Results and discussion

Optimization of process

The solution 1 was typical of the mushroom lines, and the two lines appear obvious dislocation, dislocation of two main reasons is used to line the film pattern transfer with wet film, and the film on artificial alignment is guaranteed: the line appears mushroom is mainly due to wet the thin film thickness of artificial printing (about 1/3OZ), the late electroplating copper (the thickness of about 2OZ) caused by protruding lines.

Two dry membrane stacks up to two times by solution 3 design does not appear mushroom lines, compared to the wet film made by the method of lines have been greatly improved, the reason lies in the analysis of dry film production line method with the LDI (laser direct imaging) in line alignment, alignment can be guaranteed degree, and because the dry film thickness is about 1OZ, and a circulation of only thick plating thickness of about 1OZ, and the time of plating basically does not appear mushroom line.

In solution 2,once posted film made in the dry line alignment degree compared to the three schemes two dry line film made by the method of sticking to some poor, the main reason is that with a dry film lamination method to make the circuit when the solder alignment is 7 times, and two times of dry film making method when the number of resistance welding line alignment is only 4, obviously artificial resistance welding para number line dislocation is more obvious, in addition to the solder alignment number, production cycle is long, so the quality and delivery time from the two aspects, solution 3 is more advisable than solution 2.

Through the above analysis, it can be seen that solution 3 (two times foil method) is an ideal process flow for making extra thick copper foil circuit board.

Control of special process

Graphic electroplating

The copper thickness of the circuit is thickened by pattern plating, so that the line is in accordance with the dry film, so as to facilitate the next sticking of the dry film. The current pattern plating than the actual calculated value is smaller, generally small 2~3A is appropriate, and timely to try hand surface roughness, avoid copper electroplating and showed protruding lines like mushrooms, also at the time of plating in the plate around the clamp at the same time reversed flow the printed circuit board in the direction to improve the uniformity of copper plating.

Solder Resist

In the production process of solution 3, the pre-printed solder mask is mainly used to pave the flat surface before the last printing resist welding, so as to make the later dry film tight.

Specific operations should be controlled in the following aspects:

a.Uses two printing plate oil way, first use 43T screen, still time to do a proper extension, in order to eliminate the line between bubbles, 77T use pre baked screen second times normal static ink, baking plate. The board should be placed horizontally in case of standing and drying to prevent vertical flow.

b. Exposure, the exposure energy energy than ordinary plate is slightly lower, t-stops control in about 10, to prevent light scattering and developing without a net, and then causes the ink into the graphics have obvious “ladder” line.

Solder resist curing

Resistance welding after curing, curing and to segment at the highest temperature (150 DEG C) to add baked 30min, the reason is that the solder after the board next to the copper deposition, if the ink curing is not sufficient, so the heat resistance, chemical resistance will be very poor, strong alkaline substances will sink with ink culink in not completely cured the acidic resin reaction of neutralization reaction, causing the ink off.

sinking copper and plate electricity

Copper prior to mechanical pretreatment, in order to improve the surface roughness, increase the surface area, and increase the adhesion between the copper layer and the surface of the sink. In the process of copper deposition in the board on the swelling tank and glue residue in the groove of the time can not be too long, generally 5~7min is the best, the board has enough activity, if longer, so it is possible to erosion ink not resist alkali caused by solder layer off.

Before the board power, the board should be baked at 100 degrees 1h to remove the moisture between the copper sink and the solder layer, and then improve the bonding force between the two, and prevent the copper layer blister after the board electricity and cause the fall off. When the plate is charged, a cycle is plated with the current density of 1.2ASD, and the copper thickness of the surface can reach about 1/3OZ.

key process etching

General copper clad plate, surface copper thickness is HOZ~2OZ, but for the thick copper printed circuit board, the surface copper thickness reached more than 3OZ, the etching inevitably adopts multiple etching, etching the number of lateral erosion is more serious, affecting the accuracy of line is also bigger.

For this experiment, the later layers on line in copper plate, electric (about 1/3OZ thick copper) on the basis of production, that is to say in pattern etching, etching the base copper thickness need only about 1/3OZ, now basically does not exist side etching. But it is important to consider is to end the 4OZ copper material side erosion graphic etching, we need proper compensation for the line, with its lateral erosion make up, make the lines precision to meet the design requirements. Table 1 shows the relationship between the thickness of copper foil and the amount of single side etching.

Conclusion

By sticking two times dry film layer by layer stacking method is an ideal process route for making super thick copper PCB plate. It not only can ensure alignment of the line, but also can effectively avoid mushroom like lines appear

Through the B. line to thicken pattern plating copper thickness, its current value is slightly smaller than the actual calculated by 2~3A; solder resist ink paved surface, the exposure energy is slightly lower than ordinary board, solder after curing, curing and to segment at the highest temperature (150 degrees Celsius) to add roast 30min: copper before mechanical pretreatment, and to shorten the board in the swelling and glue residue in the groove of the time: the bottom copper 4OZ production line, to compensate for the line, to compensate for the lateral erosion: in the actual production process, we must control the the key process, so as to get good shape, line precise ultra thick copper PCB board.

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Posted on 23 Oct 2017
By info@kingsunpcb.com
In PCB knowledge

Small PCB Manufacturing

Although the development of PCB technology is changing with each passing day, many PCB manufacturers focus on the HDI board, rigid flex board, backplane and other difficult parts.However, the existing market still has some relatively simple lines, unit size is very small, complex shape of the PCB, part of the smallest size of PCB even 3-4mm.The plate unit size is too small, unable to design the positioning hole in front design, using the way of positioning processing is easy to produce edge convex points, small PCB will be sucked by dust in the process, tolerance is not controllable, low production efficiency etc.. In this paper, the ultra small size PCB production has been deeply studied and experimentally optimized, and the shape machining method has achieved twice the result with half the effort in the actual production process.

Status analysis

The selection of the shape processing method is related to the shape tolerance control, the contour processing cost, the shape processing efficiency and so on in the contour processing. At present, the common shape processing methods are milling and punching.

Milling

Generally speaking, the machined surface of the milling workpiece has good appearance quality and high dimensional accuracy, but the size of the workpiece is difficult to control because of its small size.In the milling process, due to internal routing arc, internal routing angle and milling groove width restrictions, has great limitations of cutter size selection, often only 1.2mm, 1.0mm, 0.8mm, because the tool is too small, cutting speed is limited, resulting in inefficient production and processing. The cost is relatively high, so it is only suitable for small, simple shape, PCB shape processing without complex internal slot.

Punching

When processing large quantities of small size PCB, the effect of low production efficiency is much higher than that of the contour milling machine. In this case, only punching can be adopted.At the same time for internal slot PCB, some customers are processed by the right angle, drilling and milling is difficult to meet the requirements, especially for those who require a higher dimension tolerance and shape consistency of the PCB, should use punching outline. Punching outline process will increase manufacturing cost.

Experimental Design

According to our company’s experience in making such PCB, we carry out in-depth research and experiment from milling form processing method, stamping die, V-CUT and other aspects, the specific experimental plan is as follows in table 1:

Experiment process

Solution 1—> Outline by milling

Such small size PCB products have no internal positioning, and need additional positioning holes in the unit (Figure 2). When the three side are finished milling, there are open areas around the board, the tooling point not by force, the whole cutter drilling with refined offset direction, so that the finished tooling in forming obvious convex point.Because the 4 sides around have been milling into a suspended state, can not get support, so increased the incidence of bumps and burrs. In order to avoid this abnormal quality, the routing file must be optimized and divided into two milling plates. First, milling the parts of each unit to ensure that there is still a connecting position after processing to make the overall connection profile file (Figure 3).

Figure 2 Figure 3

The influence of milling machine processing experiment on the convex point: according to the above two kinds of routing processing, under each condition randomly selected 10pcs finished product board, using the two dimension for convex point measurement. The size of the finished product board of the original routing is larger and needs manual processing; the processing of the optimized routing can effectively avoid the protruding point, and the product board has a convex size of <0.1mm, which meets the quality requirements.

Solution 2 —> Outlineby CNC engraving and milling

Because the carved equipment cannot pause in the process, the figure 3 cannot be used with milling. The production according to figure 2 routing file, for processing small size, in order to prevent in the process of the finished plate by the dust sucking off dust in the processing process, and with the use of cover plate fixed with the minimum ash, reducing the occurrence of bumps.

The effect of processing on the carved bump: processed according to the processing method, can reduce the size of bump, bump size are shown, the bump can not meet the quality requirements, the need for manual processing.

Solution 3—> Outline by laser machine

Select the product of online contour size 1x3mm to test, make laser profile file along the contour line, according to the parameters, close the dust (to prevent the process of being sucked out of the plate), double sided laser appearance.

The experimental results of laser shape processing of finished plate without convex point, processing size can meet the requirements, but the shape of the finished product by laser laser black pollution surface, and such pollution because the size is too small, can not be used in plasma cleaning, wipe with alcohol can not be effectively treated, the processing effect can not meet customer demand.

Solution 4 —> Outline by punching

The punching process guarantees the size and shape accuracy of the stamping parts, without protruding points. However, it is easy to produce abnormal plate angle injury during processing, and this kind of abnormal defect is not accepted.

Conclusion

According to the shape of precision tolerances for +/-0.1mm high precision and small size PCB in milling, as long as make reasonable design in dealing with engineering data, and choose the suitable processing method based on PCB material and customer demand, a lot of problems will be smoothly done or easily solved.

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Posted on 17 Oct 2017
By info@kingsunpcb.com
In PCB knowledge

Gold Finger PCB Making

Gold finger PCB design purpose: through the connector plug as the board of external contacts output, so gold finger process is needed.

The characteristics of gold: it has superior conductivity, wear resistance, oxidation resistance and reduce contact resistance. But gold is very expensive, so it is only used for partial gold plating or chemical gold of gold fingers, such as bonding pad and so on.

The process flow

Upper panel—>grinding panel (micro corrosion)—>washing—>activating—>washing—>nickel plating—>washing—>activating—>washing—>gold plating—>gold recovering—> washing—>drying—>laying down

Steps:

Tape sticking—>Reel tape—>Automatic nickel gold—>Tear tape—>Washing and drying

The role of auxiliary components in plating bath

Boric acid: buffer function, can maintain the relative balance of pH value, the concentration of 35~55g/l; nickel chloride: is an anode activator, can effectively promote the dissolution of the anode nickel angle, to avoid passivation of the anode.
Brightener: can improve the brightness of the coating, the brightener used for ACR-3010, the control range is 25~35ml/l.
Anti pinhole agent: can effectively remove the hydrogen bubble on the coating to prevent pinhole defects.
Brightener and anti – pinhole additive method: less frequently used, plus appropriate, one-time do not add too much.

Homework and precautions

The purpose of adhesive tape

The board is only exposed to the part of the gold-plated finger, and the other is covered with adhesive tape, anti plating. Tape is a tape Sumikin deliberately, finger and finger too far away from the phenomenon is not allowed to prevent cuts in the removal of the tape sheet, avoid man-made scratch.
Operation should pay attention to the use of tape can not be “degumming” phenomenon, so as to avoid residual copper stains. This step is the most human consumption, and the listing of automatic taping machines will bring another revolution in industry.
The purpose is through the tape reel, the tape reel machine and plate compact, avoid the tape is not compacted in nickel gold tape inside drops caused cross contamination between the cylinder drops.

Grinding panel (micro corrosion)

Remove the grease, oxide and green oil on the surface of the panel, provide a bright, rough copper surface, and increase the bonding power between the copper layer and the nickel plated layer.

The role of activation

Removal of copper surface, slight oxidation of the skin and copper surface re oxidation, so that the copper surface more polished clean, to maintain the copper layer or nickel layer of activity, and enhance the substrate metal and metal to be plated between the bonding force.

Plating with nickel

As the gold layer between the copper layer and the barrier to prevent copper migration. to improve production rate and save the amount of gold, now almost all of the vertical conveyor belt automatic Au plating equipment, main salt bath is a nickel sulfamate nickel content is very high and very low stress of coating (Nickel Sulfamate Ni (NH₂SO₃)2_o 4H₂O).

Analysis of gold finger common problems

High current zone burning

Reasons: the concentration of gold is not enough; the proportion is too low; the mixing is not enough; the gold plating liquid is contaminated by nickel and copper.

Processing method: adding salt; high proportion; strengthen stirring; removal of metal pollution.

Coating adhesion is not good

Reasons: poor bonding of copper and nickel; bad combination of nickel and gold; poor cleaning before nickel plating; great stress on nickel plated layer.

Processing method: pay attention to the effect of copper treatment before nickel plating; pay attention to the effect of nickel treatment before gilding; strengthen the effect of pre plating treatment; clean plating solution; carry out cylinder or carbon treatment on nickel cylinder.

Gold color is bad

The reason is that the additives are too small, the pH is too high, and the plating solution is contaminated by Ni2+ and other metal ions.

Treatment methods: supplement the right amount of additives, adjust the pH value, remove metal pollution, and pay attention to the prevention of pollution at ordinary times, especially the frequent occurrence of nickel ion pollution.

Board gold color (face color bad, especially in the wet season)

Reasons: cleaning and drying are not complete; gold-plated plates are stored in corrosive environments.

Treatment method: strengthen the cleaning and drying effect after gilding; gold-plated plate should be kept away from corrosive environment.

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Why Circuit Board (PCB) Is Mostly Green Color?

Everyone has discussed the circuit board, that what is green layer(solder welding, green oil), what to do (to prevent welding process, solder paste and copper surface contact caused by short circuit)?

First of all, the main component of green oil is resin + green paint. Of course the resin is not green by birth,and then mix the paint and make it green (here’s no production flow).

You’ve got to ask, why paint? Because the resin is translucent products, if do not add color, it is really difficult to see whether the solder on the circuit board, if can not to see how on-line production? Especially when you rely on visual inspection in early days , testers at the next station will work with you desperately.

Finally, it becomes easy on the color check, you can prepare on-line board.

Well, there’s still no answer. Why is green more?. But the smart friends who may have found early, the inspections are more visual in early days. Since childhood, the teacher says, green is good to the eye, fight fatigue. The line workers have to protect their eyes in overload works every day (in fact, hope that they are not so tired, work more, make fewer mistakes, and evil capitalism).This is one of the reasons why green is the main reason.

The second reasons, we go back to cost. Well, yes, I’m a buyer, and the cost is very important. As the production process, green is the mainstream, the procurement of natural green paint will be greater, it can be asserted that green paint procurement costs relative to other colors will be lower. At the same time, the same color coating can reduce the cost of line changing in mass production.

The third reasons are directly related to the second cause. In order to reduce the cost, many companies will produce green green oil in large quantities. If you need other red orange yellow black blue violet, is based on the existing green on the blending of other colors. You see, extra paint costs money. There will also be customers with special needs, manufacturers can also choose this case directly when add paint on the use of red orange yellow black blue violet paint when great amount.

For these three reasons, green has become the mainstream color of the PCB industry.

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PCB Soldering Tips

In round welding order.The device of welding sequence: resistors, capacitors, diodes, transistors, integrated circuits and other components of the power tube for small to large.
Both the chip and the base have a direction,The welding should be in strict accordance with the PCB board gap with the direction of the chip, the base and the PCB of the three gap corresponding.
Welding to make solder are all around the tin soldered firmly, prevent weld.
In polarity welding capacitor round, general exergy capacitance values are relatively large, the capacitor is divided by the length of the pin feet corresponding “+” in the hole.
Before installing the chip, it is better to bend the sides slightly so that it is inserted into the socket corresponding to the base.
Potentiometer also has direction, and its knob and PCB board on the protruding direction corresponding.
When taking the resistance, find the required resistance, take the scissors, cut the required number of resistors, and write the resistance to find.
After loading the same specification, install another specification, and try to make the resistor the same. After welding, the surface of the printed circuit board is exposed and the excess pin is cut together.
Welding integrated circuit, the first check the type, pin location is in accordance with the requirements. When the first edge of welding welding pin two pin to the location, and then from left to right from top to bottom by welding.
Electrical components for pin long, such as exergy capacitor, the resistance etc.. After welding, cut it short.
After welding with a magnifying glass view spot, check whether the occurrence of weld and short circuit conditions.
When there is a connection to access, be careful not to make the connection that the depth is too long, the rubber wire rotation in the skin, the situation is broken.
When the circuit is connected, it is better to use cleaning agent to clean the surface of the circuit so as to prevent the short circuit of the circuit.
In the aging of multiple instruments, we should pay attention to the connection of wire, zero line to zero line, FireWire to firewire.
When the final group is turned, the wires should be secured to prevent confusion and crossing.
The aging process can be found a lot of problems; the connection to pick tight screws to be tightened, when repeatedly plug several times, should pay attention to the connection joint is damaged.
Tin should not be excessive when soldering tin. When the solder joint is tapered, it is the best

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Posted on 21 Sep 2017
By info@kingsunpcb.com
In PCB Soldering

Tips In High Speed Signal PCB Design

How to choose PCB board material?

For the selection of PCB sheets, a balance point must be reached between the design requirements and the mass production as well as the cost. Design requirements include electrical and mechanical components of the two parts. This material problem is important when designing a very high speed PCB board (greater than the frequency of GHz). For example, in today’s commonly used FR-4 materials, the dielectric loss at several GHz frequencies can have a significant effect on signal attenuation and may not be applicable. For electrical purposes, however, it should be noted whether the dielectric constant and the dielectric loss are applicable at the designed frequency.

How to avoid high frequency interference?

The basic idea of avoiding high frequency interference is to minimize the interference of high frequency signals and electromagnetic fields, also called crosstalk). The distance between the high speed signal and the analog signal can be used, or the ground guard/shunt traces is next to the analog signal. Attention must also be paid to the noise interference of the analog ground digitally.

In high-speed design, how to solve the integrity of the signal?

Signal integrity is essentially a problem of impedance matching. The factors that affect impedance matching include the signal source architecture and output impedance , the characteristic impedance of the line, the characteristics of the load, the topology of the routing architecture, etc.. The solution is based on the topology of the termination and the adjustment line.

How is the differential distribution pattern implemented?

Differential pair wiring has two points to note, one is the length of the two lines to be as long as possible, and the spacing of the two lines (where the distance is determined by differential impedance) to remain the same, that is, to keep parallel. There are two parallel ways, one is the two lines walking on the same line (side-by-side), and the other is the two lines moving up and down the next two layers (over-under). In general, side-by-side implemented more.

For a clock signal line with only one output, what is the difference between the lines?

In order to use differential distribution lines, it must be the signal source and the receiver that are differential signals. It is impossible for a clock signal with only one output to use differential distribution lines.

Can a matching resistor be added between the differential lines of the receiver?

The matching resistance between the differential lines of the receiving end is usually added, and the value should be equal to the value of the differential impedance. The quality of the signal will be better.

Why should differential pair routing be near and parallel?

The routing of the differential pair is appropriate to be near and parallel. The proper spacing is close to that because this will affect the differential impedance value, and this value is an important parameter to the design differential impedance. Parallel is also necessary to maintain consistency of differential impedances. If the two lines are routed suddenly near suddenly far, the differential impedance will be inconsistent, which will affect signal integrity and time delay.

How to deal with some theoretical conflicts in actual wiring?

Basically, the separation of modules / numbers is correct. It should be noted that the signal should not be crossed as far as possible in the moat, and do not let the returning current path become too large.The crystal is a positive feedback oscillation circuit simulation, have stable oscillation signal, gain and loop must meet the phase specification, and the specification of this oscillation analog signal is vulnerable to interference, even with the ground guard traces may not be completely isolated interference. And too far away, the noise on the ground plane will also affect the positive feedback oscillation circuit. So make sure that the distance between the crystal and the chip is near.Indeed, there are many conflicts between high-speed wiring and EMI requirements. But the basic principle is that, because of the resistor, capacitor or ferrite bead added by EMI, some electrical characteristics of the signal can not be met. Therefore, it is better to solve the problem of EMI by arranging the routing and PCB stacking techniques, such as high-speed signals coming in the inner layer. Finally, resistors, capacitors, or ferrite bead are used to reduce the damage to the signal.

How to solve the contradiction between manual routing and automatic routing of high speed signals?

At present, most of the automatic cabling devices with strong cabling software have set constraints to control the winding mode and the number of vias. Each EDA company’s winding engine capabilities and constraints setting projects sometimes are great different.

Regarding test coupon

The test coupon is used to measure whether the characteristic impedance of the PCB plate produced by TDR (Time, Domain, Reflectometer) meets the design requirements. Generally, the impedance to be controlled has a single line and a differential pair of two cases. Therefore, the line width and line distance of the test coupon are the same as those of the line to be controlled. The most important thing is to measure the location of the site. In order to reduce the inductance of ground lead, TDR probe ground areas are usually very close to the local signal (probe tip), so test coupon measurement signal to ground distance and approach to meet the probe.

In the high-speed PCB design, the blank areas of the signal layer can be deposited with copper. How should the copper layers in the multiple signal layers be allocated on the ground and the power supply?

Most of the copper deposited in the blank area is grounded. Only when the copper is deposited near the high speed signal line, the distance between the deposited copper and the signal wire should be paid attention to, because the copper deposited will reduce the characteristic impedance of the wire. Also be careful not to affect the characteristic impedance of its layer, for example, in the structure of the dual strip line.

Is it possible to use the microstrip model to calculate the characteristic impedance of the signal line above the power plane? Can the signal between the power and ground planes be computed using a stripline model?

Yes, when calculating the characteristic impedance, the power plane and the ground plane must be regarded as the reference plane. For example, four layers: top layer, power layer, stratum bottom layer, and then the top line characteristic impedance model is a microstrip line model with power plane as reference plane.

Can automatic test points be generated through software on a high density printed circuit board, and can it meet the testing requirements for mass production in general?

The general software automatically generates test points to meet the test requirements. It is necessary to see whether the specifications of the additional test points meet the requirements of the test tools. In addition, if the line is too dense and the testing point is more strict, then it is impossible to automatically add test points to each line. Of course, you need to manually fill the place you want to test.

Does the addition of test points affect the quality of high-speed signals?

As for the quality of the signal, it depends on how fast the test point is added and how fast the signal is. Basically, additional test points (via or, DIP, pin), when tested, may be added to the line or pulled out a little line from the line. The former is equivalent to adding a small capacitor on the line, while the latter is more than one branch. These two cases will have some impact on the high-speed signal more or less, the extent of the impact is related to the signal frequency, speed and signal margin change rate (edge rate). The size of the effect can be learned by simulation. In principle, the smaller the test point, the better (of course, to meet the requirements of the test machine), the shorter the branch, the better.

How should the ground wires between the boards be connected to a number of PCB systems?

Each PCB board connected signal or power in the action, such as the A board has the power or signal is sent to the B board, the current must be equal from the formation to flow back to the A board (the Kirchoff current law). The current on this layer will flow back where the impedance is least. Therefore, in each power or signal interface, the number of pins allocated to the formation can not be too small to reduce the impedance, which can reduce the noise on the formation. In addition, can also analyze the current loop, especially the larger part of the current adjustment, the formation or wire connecting method, to control the current law (for example, somewhere in the low impedance, make the most of the current from the place to go), to reduce the influence of other sensitive signal.

Two characteristic impedance formulae that are often used

Microstrip line Z={87/[sqrt (Er+1.41)]}ln[5.98H/ (0.8W+T)] the W is linewidth, T is copper wire thickness, H is the reference plane distance of line, Er is the dielectric constant of PCB plate material. This formula must be applied only when 0.1< (W/H) <2.0, and 1< (Er) <15 are applied.

Stripline Z=[60/sqrt (Er)]ln{4H/[0.67 PI (T+0.8W)]} the H is distance of two reference plane, The line be routed at amid the two reference plane. This formula must be applied in the case of W/H<0.35 and T/H<0.25.

Whether can add a ground line to a differential signal line?

The middle of a differential signal is usually not ground. Because of the application principle of differential signals, the most important point is the advantage of differential signal inter coupling, such as flux, cancellation,noise immunity noise capability and so on. If the ground wire is in the middle, it will destroy the coupling effect

The principle of PCB and the point of the enclosure ground

The principle of selecting the PCB and the shell site selection is to provide a low impedance path using the chassis ground to return current and to control the path of this return current. For example, usually in the vicinity of high frequency devices or clock generator, can be fixed with screws by PCB ground and chassis formation are connected to minimize the current loop area, also is to reduce electromagnetic radiation

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Posted on 18 Sep 2017
By info@kingsunpcb.com
In PCB design

The 8 Things You Should Know In PCB Design

Do not forget to add capacitive filter at the power input and output

Normally, the electrical signals are unstable at the input and output of the power supply, and the power supply directly to the load will cause damage to the load for a long time, and it will also make the work unstable.And we know that the capacitor has the function of storing energy and filtering the voltage. The capacitor stores the electronic charge inside it and goes into the capacitor. The electronic charge accumulates continuously, and then the output with smooth. The output is smooth and free of fluctuation, so that the load can get a steady and steady flow of input.A smooth, fluctuating voltage that makes the load more reliable and does not damage the device. Filtering the voltage supplied to the load by the capacitor, from an empirical point of view, it’s generally a large electrolytic capacitor, with a 104 capacitor filtering. Large capacitors are used to filter low frequency waves, and small capacitors are used to filter high frequency waves. Two combinations are used, and the effect is ideal.

Don’t let the useless power go too far

In the circuit design, we should try to make the useless power design as small as possible, so as to improve the power factor. If in the circuit design, the board of heat accounted for a large part of the board backward output power will be reduced. If a board power consumption increases, when the output power of the board unchanged, then this requires the board input power, which will be more power consumption.

Do not arbitrarily select the power of components

Each electronic components have different power, high power selection will lead to electronic components price is high, the cost increase. If two small power will cause electronic components fever,it will make short lifetime in long-term work with high temperature. We should select the power of the electronic component reasonably through calculate the power consumption of the component in the circuit. When the rated power of a component is known, it is better not to exceed the rated power of the designed circuit, otherwise it needs to be cooled.When the current on the component is relatively large, we should ensure that the pressure on both sides is not too big. That is, if we select the current value that flows through it, then there is a maximum critical value for the pressure difference between the two sides of it.

Don’t ignore the basic features of components

As an electronic engineer, to be able to design a circuit of a better, to be able to use the basic characteristics of electronic components, we will learn the existing components, working principle and characteristics to collocation and combination, and the formation of the various functions of the circuit to achieve an objective demand.Like a one-way conduction diode, an important characteristic of reverse voltage clamp, etc.,reverse voltage characteristics of the voltage stabilizing tube, triode fluidic flow etc..

Do not forget the commonly used electronic components package

The encapsulation of electronic components is actually the shape of components, including the size of components. In the circuit design process, to the components of the package, cooked in the heart, when talking about a package, in the brain inside can know what this is, want to come out and form a concept. First of all, in the process of production, the packaging is related to the production of welding technology. Secondly, in the PCB layout design, the board decided to package the appearance. Familiar with common packaging, component selection process with half the effort.

Don’t ignore modular design

The hardware design and software programming software is the same, when writing the program, we have to put each function into a function module, in different projects, sometimes using the same function module.For example, we write lighting, communication into a fixed function module. When we use it in different projects, copy it directly and we can use it directly. This greatly reduces the time we write programs and improves efficiency, which we call modular management.Therefore, the hardware engineer or senior engineer not only make circuit design but also the modular design, thereby greatly reducing the module design time, improve design efficiency, make our design simple. There is no need to repeat the same job in a single project.

Don’t ignore costs

As an electronic engineer, it is necessary to pay special attention to the cost of the product. The cost is the red line running through the beginning and the end of the project.For a company, the final product will be sold in the market. For the purpose of profit, if you design the product is too expensive, so even if you do good, no one will buy it, the project will fail. For an excellent engineer, one of the best things to do is to take the cost as a measure.

Not a single angle of thinking design, overall design should be integrated

You can not drag the components from the beginning design, Such design lacks systematicness and overall arrangement direct drawing with no change. We need to have a global view, and then design each detail, also needs theory as a guide.

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Posted on 11 Sep 2017
By info@kingsunpcb.com
In PCB design

PCB Via Size 12mil Is Perfect For Current?

When designing a PCB, how to choose the via size? There are two voices.One voice said: choose 10-12mil via,Large vias are not helpful for heat dissipation and flow design, and the parasitic inductance of small holes is very small, which can effectively reduce the impedance of the power path. Another voice said: choose 20~24mil large via, the thick copper thickness with large via,large current carrying capacity and save space.

The copper plating thickness is from 0.8mil to 1.0mil follow IPC Class II and III standard,considering that the copper plating thickness of the vias may be up and down, the middle is narrow, the narrowest limit may be 0.7mil, so we evaluate the thickness of the hole plating in accordance with the 0.7mil.

After setting up the parameters above, we calculate the via current, and summarize the following table:

We have done some analysis on the table above:

12mil via can safely carry around 1.2A of current, which is looser than the widely recognized 0.5 in the industry.
The larger 16mil, 20mil, and even 24mil via do not have obvious advantage in current carrying, and not linearly increasing.

Therefore, we recommend 10~12mil via to load current, higher efficiency, but also more convenient design. Then,If have the current carrying data so can be safely designed? Let’s look at the simulation tests below:

We feel very safe that hitted 20 vias with 12mil on 20A current board,but in fact, the current isn’t as good as you think,they are not evenly distributed over the 20 vias,you can see the case of through-hole current through simple DC simulation.Some vias take the 2.4A current, and some are only 200mA.Of course, the design may not have much risk at last. Because the vias of 12mil are capable of carrying more than 2A of electric current at 30 degrees of temperature.But what if the inhomogeneity is further magnified? This is related to the passage of your current, the distribution and number of vias. What if one of the vias has gone through the 3A or even 4A current? At this point, you design 25 or 30 vias,it’s not great helpful if there isn’t critical position current, the reason is the same sentence: “the current is not as good as you think.”

This conclusion is also true when determining the width of copper area,we can find it from a lot of simulation results, when the large current design is not enough in one layer of copper area, a layer is added to take the current, and the current is not equally distributed.

When the current reaches magnitude 20A or greater, the conventional copper current carrying capacity and through hole current carrying capacity are both at risk. The most effective way is to evaluate it through DC simulation software.

Simulation of the DC voltage drop the algorithm is not complex, setting is simple, the simulation result is more accurate, it’s large helpful for the design of large current, it’s PCB design engineer or hardware engineers’s necessary entry tool in the beginning of simulation touch.

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Posted on 2 Sep 2017
By info@kingsunpcb.com
In PCB design

MCPCB Factory Tell You LED Self Dimming Lighting System

LED brightness adjustable function is very important in LED lighting, but also the segment need to be great taked care in LED lamp and LED display.The following MCPCB manufacturers will analyze the principle of LED self dimming lighting system.

The technical principle of LED self regulating lighting system

The LED self dimming system is designed and developed according to the dynamic characteristics of public lighting and the concept of “on-demand lighting”.It integrates three parts of pyroelectric infrared mobile detector, dimmer controller and LED light source, and realizes the mute control of luminance in the lighting place. When a person (car) activities in the vicinity of lamps and lanterns, lamps installed on the pyroelectric infrared motion detector transmits collected signals to the dimming controller, dimming controller according to the received signal, control LED light brightness, and delay time.

If the delay time is exceeded, the detector can not capture the signal of human activity, and the LED light source will be changed from bright to low (or out of). If the delay time detector can still collected human activities (car) signal, LED light source will continue to maintain high, thus ensuring the premise of not reducing lighting quality, greatly reduce the “invalid lighting” time, the public places “on-demand lighting, energy-saving effect is very obvious.

Because every day in between bright and low light energy, and most of the time in the low light, bright day time lightning is less than four hours, to avoid the phenomenon of light LED light source long time high current generated by high temperature, so the LED light source is very small, prolonged service life.

LED main dimming method

The dimming function for incandescent lamp can achieve lower costs, along with the development of LED lighting products, LED lighting in the conversion can be reluctant to lose the advantages of dimming control, LED lamp dimming method mainly, there are three kinds of common, these three kinds of dimming skills are according to the change of LED drive the current input to the dimming. In accordance with different circuit systems can also be divided into analog dimming and PWM dimming.

The first: the dimming dimming method for driving current through the modulation of LED to complete the LED lamp, the brightness and LED chip LED drive current into a certain proportion, so we adjusted the LED drive current control LED lamp brightness can be.

The second type: the dimming method is called analog dimming or linear dimming. The advantage of the dimming method is that when the driving current increases linearly or decreases, the influence of the drive current overshoot on the life of the LED chip is reduced, and the anti disturbance performance of the dimming circuit is stronger. The defect is that the size of the driving current changes, which definitely affects the color temperature of the LED chip.

Third: This dimming method is called pulse width modulation (PWM). This method is by adjusting the drive current is undulate, the pulse width of the variable, after the change of the pulse width modulation for LED light modulation of continuous light time, also changed the input power, so as to achieve the goal of energy saving, dimming. The frequency is about the same as usual, about 200Hz~10KHz; because of the visual lag of the human eye, the light produced by the light source in the dimming process will not be perceived. The advantage of this dimming method is that it can improve the heat dissipation performance of LED, and the defect is that the drive current overshoot affects the life of LED chip.

In general, analog dimming can usually be done very simply. However, due to the characteristics of the LED light, the average driving current will be shifted. For monochromatic LED, the primary wavelength changes. For white LED, the associated color temperature (CCT) changes.

Dimming with PWM ensures that the LED sends out the colors that the designer needs. PWM dimming can also improve output current accuracy. Analog dimming using linear modulation reduces the accuracy of the output current. Generally speaking, PWM dimming can be more accurate than linear control light output relative to analog dimming

In terms of energy saving, there is no comparability. Because PWM ensures the current (light intensity) under CCT and color conditions, analog dimming does not exist. If you want to sacrifice this premise to consider energy saving, you need the actual data. But it is estimated that PWM will have an advantage in achieving the same illuminance. From the dimming response time, the PWM dimming is faster because of its response and enables more precise dimming. It is widely used in practical use.

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Posted on 28 Aug 2017
By info@kingsunpcb.com
In MCPCB

What Is The Difference Between Series Circuit And Parallel Circuit ?

What is a parallel signal and Serial signal?

To understand parallel signals and serial signals, let’s first understand the concepts of parallel communication (transmission) and serial communication (transmission).A parallel signal is a signal that is communicated in parallel, and a serial signal is a signal that is communicated in serial mode. Serial communication refers to the data transmission line in a single bit, a bit by bit in order delivery way, in the early days of the definition also said that only one data line, each clock pulse can only send a data mode.In a parallel communication in bytes (8 bits) data is at the same time by the end of the source to the destination in the 8 parallel transmission line, but also can be said to have a plurality of data lines (few is several), can send multiple data bits in each clock pulse (several parallel port to Send a few).

So early on serial communication and parallel communication understanding: a byte of data the same (8), serial communication to 8 from low to high order a bit transmission, and parallel communication with 8 line, so long as one can be transmitted in the past, the image of the said. Line (channel) compared to the Road, and arranged a few car can be said to be “parallel”, only a car opened as belonging to the “serial”.

Comparison, advantages and disadvantages of parallel communication and serial communication

Obviously, parallel communication is much faster, faster and less time-consuming than serial communication. But these are the theoretical understanding of early I/O rate is not high in the case, with the rapid development of information technology, before understanding the now outdated, because now is the era of high-speed serial signal (the subject).In high-speed state, crosstalk exists between several data lines of parallel port, while parallel port needs simultaneous sending and receiving of signal. Any delay of one data line will cause problems. The serial only one data line, there is no crosstalk between the signal lines, and serial can also use low-voltage differential signal, which can greatly improve its anti-interference.Therefore, a higher transmission rate can be achieved, although parallel data can be transmitted at a time, but the clock is much lower than the serial number, so the current serial transmission is the first choice for high-speed transmission.

From another point of view, parallel transmission has many ways, such as system synchronization (common clock) and source synchronous clock mode. First we look at the inherent problems of system synchronization, and the diagram below is a schematic diagram of the system synchronization in parallel transmission.

First, parallel signals are acceptable in the early days because of the need for multiple transmission paths. But Moore phenomenon makes compared with several decades ago the number of silicon chip circuit can produce a substantial increase, and the density of pin chip package technology and did not like the same density of silicon at the same speed increase, so the I/O pin package actually is expensive than silicon circuit, which means that for most of the chip pin feet more and more becomes unacceptable.

The second underlying problem is the demand for time series. From the above figure, the data is synchronized by chip 1 and is captured by the same clock synchronization on chip 2. The input data of chip 2 must be satisfied with the setting and holding time of the clock input relative to the chip. The detailed system synchronization timing model is shown in the following figure.

These build and hold times must be calculated with sufficient margin to allow clock allocation paths to be delayed to two chip differences, and to trigger and capture flip flops through the chip. Delays may vary depending on the chip process, voltage and temperature (PVT) conditions, and additional margin must be added to meet the worst case. For higher clock frequencies, it may be necessary to use the phase locked loop (PLL) in the chip to adjust the clock phase to compensate for on-chip clock allocation delays, and to adapt to variations in process, voltage, and temperature conditions. If the clock frequency is high enough, it is impossible to establish a system that can reliably transmit data through such a common clock bus.

Posted on 24 Aug 2017
By info@kingsunpcb.com
In PCB design